Special
Function Registers (SFR) of 8051 Microcontroller in detail
            Registers
are the memory elements that are used to store user data. In 8051
microcontroller there are almost 20 SFR’s and each one have unique function.
The list of SFR is given below with vector location. Formats of typical SFR’s
like PSW, TCON, TMOD, IE, IP, SCON, PCON, SBUF are given below and we will
discuss SFR’s in detail in upcoming articles. 
| S.N. | SFR | Name | Vector Address | 
| 1 | A | Accumulator | 0E0
  H | 
| 2 | B | B
  register | 0F0
  H | 
| 3 | P0 | Port
  0 | 80
  H | 
| 4 | P1 | Port
  1 | 90
  H | 
| 5 | P2 | Port
  2 | 0A0
  H | 
| 6 | P3 | Port
  3 | 0B0
  H | 
| 7 | IE | Interrupt
  Enable | 0A8
  H | 
| 8 | IP | Interrupt
  Priority | 0B8
  H | 
| 9 | TMOD | Timer
  mode | 89
  H | 
| 10 | TCON | Timer
  control | 88
  H | 
| 11 | TH0 | Timer
  0 High | 8C
  H | 
| 12 | TH1 | Timer
  1 High | 8D
  H | 
| 13 | TL0 | Timer
  0 Low | 8A
  H | 
| 14 | TL1 | Timer
  1 Low | 8B
  H | 
| 15 | SCON | Serial
  control | 98
  H | 
| 16 | SBUF | Serial
  buffer | 99
  H | 
| 17 | PCON | Power
  control | 97
  H | 
| 18 | PSW | Program
  status word | 0D0
  H | 
| 19 | DPTR | Data
  pointer | DPL-82H
  DPH-83H | 
| 20 | SP | Stack
  pointer | 81H | 
| PSW (Program Status Word) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| CY | AC | F0 | RS1 | RS0 | OV | - | P | 
| IE (Interrupt Enable) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| EA |   |   | ES | ET1 | EX1 | ET0 | EX0 | 
| IP (Interrupt Priority) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| --- | --- | --- | PS | PT1 | PX1 | PT0 | PX0 | 
| TMOD (Timer Mode) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| GATE | C/T\ | M1 | M0 | GATE | C/T\ | M1 | M0 | 
| Timer1 | Timer0 | ||||||
| TCON (Timer Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| TF1 | TR1 | TF0 | TR0 | IE1 | IT1 | IE0 | IT0 | 
| SCON (Serial Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| SM0 | SM1 | SM2 | REN | TB8 | RB8 | TI | RI | 
| SBUF (Serial Buffer) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
|   |   |   |   |   |   |   |   | 
| PCON (Power Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| SMOD | - | - | - | GF1 | GF0 | PD | IDL | 
Let us discuss some SFR’s in detail
1.     PSW
(Program Status Word)
PSW is
used to observe the status of program. Consider we performed arithmetic
operation of addition, different flags of PSW indicates result of operation.
| PSW (Program Status Word) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| CY | AC | F0 | RS1 | RS0 | OV | - | P | 
| Bit | Flag | Name | Function | 
| D7 | CY | Carry flag | Sets=when
  carry is generated from MSB | 
| D6 | AC | Auxiliary carry flag | Sets=when
  carry is generated from lower nibble | 
| D5 | F0 | F0 | User
  definable flag | 
| D4 | RS1 | Register bank select | Used
  to select register banks | 
| D3 | RS0 | ||
| D2 | OV | Overflow | Sets=when
  carry is generated from MSB or D6 to D7 | 
| D1 | - | - | Reserved
  for future use | 
| D0 | P | Parity | Sets=odd
  parity of 1’s in result | 
| RS1 | RS0 | Bank
   | 
| 0 | 0 | Bank
  0 | 
| 0 | 1 | Bank
  1 | 
| 1 | 0 | Bank
  2 | 
| 1 | 1 | Bank
  3 | 
2.     IE (Interrupt Enable)
Interrupt
enable SFR is used to enable or disable interrupts provided that EA (enable
all) bit D7 must be 1.
| IE (Interrupt Enable) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| EA |   |   | ES | ET1 | EX1 | ET0 | EX0 | 
| Bit | Flag | Name | Function | 
| D7 | EA | Enable all | 1=allow
  enable/disable individual interrupt  | 
| D6 | - | - | Reserved
  for future use | 
| D5 | - | - | Reserved
  for future use | 
| D4 | ES | Enable serial interrupt | 1=enable 0=disable | 
| D3 | ET1 | Enable timer 1 interrupt | 1=enable 0=disable | 
| D2 | EX1 | Enable external interrupt 1 | 1=enable 0=disable | 
| D1 | ET0 | Enable timer 0 interrupt | 1=enable 0=disable | 
| D0 | Ex0 | Enable external interrupt 0 | 1=enable 0=disable | 
3.     IP (Interrupt Priority)
Interrupt
priority SFR is used to set or alter the default priority of interrupts of 8051
microcontroller.
| IP (Interrupt Priority) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| --- | --- | --- | PS | PT1 | PX1 | PT0 | PX0 | 
| Bit | Flag | Name | Function | 
| D7 | - | - | Reserved
  for future use | 
| D6 | - | - | Reserved
  for future use | 
| D5 | - | - | Reserved
  for future use | 
| D4 | PS | Serial interrupt priority | 1=enable 0=disable | 
| D3 | PT1 | timer 1 interrupt priority | 1=enable 0=disable | 
| D2 | PX1 | external interrupt 1 priority | 1=enable 0=disable | 
| D1 | PT0 | timer 0 interrupt priority | 1=enable 0=disable | 
| D0 | Px0 | external interrupt 0 priority | 1=enable 0=disable | 
4.     TMOD
(Timer Mode)
TMOD SFR is used to select timer and its different modes.
8051 consists of two 16-bit timers i.e. timer 0 and timer 1. 
| TMOD (Timer Mode) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| GATE | C/T\ | M1 | M0 | GATE | C/T\ | M1 | M0 | 
| Timer1 | Timer0 | ||||||
| Bit | Flag | Function | 
| D7,D3 | GATE | 1=external
  hardware is required to ON/OFF timer | 
| D6,D2 | C/T\ | 1=counter 0=timer | 
| D5,D1 | M1 | Timer
  mode selector bit | 
| D4,D0 | M0 | Timer
  mode selector bit | 
| M1 | M0 | Mode | Use | 
| 0 | 0 | Mode
  0 | 13-bit timer/counter | 
| 0 | 1 | Mode
  1 | 16-bit timer/counter | 
| 1 | 0 | Mode
  2 | 8-bit auto reload | 
| 1 | 1 | Mode
  3 | Split timer mode (only for
  timer 0, timer 1 is passive) | 
5.     TCON (Timer Control)
| TCON (Timer Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| TF1 | TR1 | TF0 | TR0 | IE1 | IT1 | IE0 | IT0 | 
| Bit | Flag | Name | 
| D7 | TF1 | Timer
  1 overflow flag | 
| D6 | TR1 | Timer
  1 run control bit | 
| D5 | TF0 | Timer
  0 overflow flag | 
| D4 | TR0 | Timer
  0 run control bit | 
| D3 | IE1 | External
  interrupt 1 edge flag | 
| D2 | IT1 | Timer
  1 interrupt bit | 
| D1 | IE0 | External
  interrupt 0 edge flag | 
| D0 | IT0 | Timer
  0 interrupt bit | 
6.     SCON
(Serial Control)
8051 support 1 full duplex serial port. SCON SFR is used
to select different modes of serial communication
| SCON (Serial Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| SM0 | SM1 | SM2 | REN | TB8 | RB8 | TI | RI | 
| Bit | Flag | Name | 
| D7 | SM0 | Serial
  mode specifier | 
| D6 | SM1 | Serial
  mode specifier | 
| D5 | SM2 | Serial
  mode 2 | 
| D4 | REN | Receive
  enable | 
| D3 | TB8 | Transmit
  bit 8 | 
| D2 | RB8 | Receive
  bit 8 | 
| D1 | TI | Transmit
  interrupt | 
| D0 | RI | Receive
  interrupt | 
| SM0 | SM1 | Mode | Use | Baud
  rate | 
| 0 | 0 | Mode
  0 | 8-bit shift register | Fosc/12 | 
| 0 | 1 | Mode
  1 | 8-bit UART | Variable | 
| 1 | 0 | Mode
  2 | 9-bit UART | Fosc/32 or Fosc/64 | 
| 1 | 1 | Mode
  3 | 9-bit UART | Variable | 
7.     SBUF
(Serial Buffer)
Serial buffer SFR is mainly used during transmission and reception
of serial data. It is blank SFR, during transmission of serial data, it must be
sent to SBUF first and then sent. During reception of data, it first goes into
SBUF.
 
| SBUF (Serial Buffer) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
|   |   |   |   |   |   |   |   | 
8.     PCON
(Power Control)
8051 supports power saving modes like power down and
ideal. In power down mode, onchip oscillator is in frozen state which cuts the
frequency to CPU and peripherals. Where in ideal mode, CPU is in sleep mode and
peripherals are active.
| PCON (Power Control) | |||||||
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | 
| SMOD | - | - | - | GF1 | GF0 | PD | IDL | 
| Bit | Flag | Function  | 
| D7 | SMOD | 1=
  double the baud rate | 
| D6 | - | Reserved
  for future use | 
| D5 | - | Reserved
  for future use | 
| D4 | - | Reserved
  for future use | 
| D3 | GF1 | General
  purpose flag 1 | 
| D2 | GF0 | General
  purpose flag 0 | 
| D1 | PD | 1=Power
  down  mode | 
| D0 | IDL | 1=
  Ideal mode | 
 
 
 
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